In the field of power semiconductors, and in particular in the field of power MOSFETs, the performance of a product is determined by the ability of the product to act as an ideal switch for a high current. Performance therefore depends on the ability of the product to provide a near-infinite resistance in the off state and a near-zero resistance in the on state.
Recent advances in power MOSFET technology have significantly reduced the on-state resistance of the semiconductor components of power MOSFET devices, making the contact metallization resistance and package resistance a significant part of the device on-state resistance. Thus, to achieve further significant reductions in on-state resistance, the metallization and package resistance must be reduced.
In addition, the resistance in a power MOSFET device generates heat which must be removed to maintain high performance. Cooling of power MOSFET devices is fundamentally limited by current device configurations. Even in vertical power MOSFET devices, a majority of the heat generated in a power MOSFET device is generated in the top 10 microns of the semiconductor die. Because thermally conductive packaging such as ceramic packaging is expensive, a thermally insulative packaging material such as plastic is typically used. Thus, to reach a cooling surface, the heat generated near the top surface of the die must either travel through the bond wires and leads, which can conduct only a limited amount of heat, or through the semiconductor to the back side of the die. Since the thermal conductivity of silicon cannot be significantly changed, significant advances in heat removal require a device configuration that allows better thermal transport from the top side of the die.